GitHub

Using Xilinx Vivado and VHDL

Git repository for the Introduction to FPGA Programming Using Xilinx Vivado and VHDL (16 hours, 4 CFU) PhD course at University of Torino, Physics Department. Lecture slides are available on the main ...
GitHub

HLS-based Xilinx ICAP Controller

This repo is an HLS-based ICAPE3 controller, which is able to read ICAPE3 registers and perform bitstream readback. However, there is no write functions. Why HLS? Because I could not write too much ...
IEEE

An improved algorithm for deep learning YOLO network based on Xilinx ZYNQ FPGA

Abstract: With the development of artificial intelligence, convolutional neural networks (CNN) have been widely used in image processing and other aspects due to their excellent performance. However, ...